Integrated circuits (ICs) are susceptible to damage by electrostatic discharge (ESD). For example, a metal-oxide-semiconductor field effect transistor (MOSFET) in an IC may have two functional elements that are separated by an epitaxial layer between the elements. An ESD current that enters one of the elements can permanently damage the epitaxial layer such that the MOSFET is no longer functional.
FIG. 1 is a schematic diagram of a conventional IC with an ESD protector. With reference to FIG. 1, an ESD protector 100 is implemented in an IC 110 to divert ESD current from functional circuitry 120 of the IC 110 and thereby protect the functional circuitry 120. For example, the ESD protector 100 may be connected in parallel with the functional circuitry 120 to an input or output pad 130 of the IC 110. The ESD protector 100 comprises a specialized MOSFET 140. FIG. 2 illustrates a cross-sectional top view of the MOSFET 140. With reference to FIG. 2, the MOSFET 140 includes multiple drain fingers 210 and multiple source fingers 220 interlaced with the drain fingers 210. The drain fingers 210 and source fingers 220 are typically disposed underneath the cross-sectional plane of the view, and are therefore not visible in FIG. 1. The drain fingers 210 and the source fingers 220 are embedded in a semiconductor base (not seen) at lateral locations that are indicated by arrows drawn from the reference numbers. The MOSFET 140 also has a gate 230 comprising gate fingers 240 disposed between the drain fingers 210 and the source fingers 220. The source fingers 220, semiconductor base, and gate 230 are electrically grounded. The semiconductor base may be electrically coupled to ground via a guard ring 250.
The ESD current is conducted into the multiple drain fingers 210 to distribute the current among the individual drain fingers 210. When a voltage at the drain fingers 210 reaches a threshold value, the drain fingers 210 conduct into the semiconductor base. The drain fingers 210, source fingers 220, and semiconductor base begin to operate as a collector, emitter, and base, respectively, of a bipolar junction transistor (BJT), conducting the ESD current through the semiconductor base and into the source fingers 220. Finally, the ESD current is sunk to electrical ground.
However, the ESD current typically flows into the drain fingers 210 non-uniformly, causing a subset of the drain fingers 210 to fail. Because there are inherent variations in the resistances of the individual drain fingers 210, the ESD current concentrates in a subset of the drain fingers 210 that present the lowest resistance to the ESD current. For example, the ESD current may concentrate in a single drain finger 210. This current concentration breaks down the subset of the drain fingers 210 and permanently damages the MOSFET 140, typically rendering the IC 110 unusable thereafter.
Furthermore, there is a need for thinner epitaxial layers used in ICs, such as epitaxial N+ doped or P+ doped layers in MOSFETs, to be made thinner as ICs are manufactured to be smaller. However, ICs tend to have a voltage tolerance that is highly sensitive to epitaxial layer thickness. For a decreased epitaxial thickness, an IC incorporating the thinner epitaxial layer may be damaged by a significantly smaller electrostatic discharge.
Thus, it is desirable to provide an ESD protector for an integrated circuit to protect the integrated circuit from larger electrostatic discharges. It is further desirable for the ESD protector to protect the integrated circuit at decreased epitaxial layer thicknesses.